1. Field of the Invention
The present invention relates to a mark forming method and a method for manufacturing a semiconductor device.
2. Description of the Related Art
In the process for manufacturing a semiconductor device, plural mask patterns are sequentially laid on a semiconductor wafer and then exposed to form device patterns at plural mask levels aligned with each other. During the exposure, a “misalignment test” for testing whether a device pattern of a reference layer and a device pattern of an upper layer are properly aligned is performed to prevent a trouble such as disconnection or leakage between the device pattern of the reference layer and the device pattern of the upper layer. For this reason, misalignment testing marks for testing misalignment of the device patterns are formed on the semiconductor wafer, in addition to the device patterns.
With the recent progress of downsizing of the semiconductor device, the sizes of the misalignment testing marks become relatively large compared to the sizes of the device patterns. In this case, an aberration or a focus position of an optical system of an exposure apparatus has different effects on the misalignment testing marks and the device patterns. When the effects of the aberration or the focus position are different, amounts of displacement in transfer positions of the misalignment testing marks and the device patterns, which are transferred on the semiconductor wafer, become different. Therefore, even when an amount of misalignment between the misalignment testing marks is minimized by the misalignment test, an alignment error in the device patterns may be large.
JP-A 2002-64055 (KOKAI) proposes a method of making the size, shape and the like of the misalignment testing mark the same as those of the device pattern, for example. This method enables to make the amounts of displacement in the transfer positions of the misalignment testing mark and the device pattern comparable and to minimize the alignment error in the device patterns.
However, when the misalignment testing mark is a set of plural fine patterns locally formed in an area with a finite width, periodicity or uniformity in pattern arrangement becomes discontinuous at a boundary (edges) of the area occupied by the misalignment testing mark. Therefore, the misalignment testing mark does not become optically equivalent to the device pattern. Accordingly, the pattern shape of the misalignment testing mark at the boundary (edges) is deformed due to the aberration or the like and becomes different from that of the device pattern, so that measurement accuracy in the misalignment test is adversely reduced.